Core-to-Core Latency: Zen 5 Gets Weird

As the core count of modern CPUs is growing, we are reaching a time when the time to access each core from a different core is no longer a constant. Even before the advent of heterogeneous SoC designs, processors built on large rings or meshes can have different latencies to access the nearest core compared to the furthest core. This rings true especially in multi-socket server environments.

But modern CPUs, even desktop and consumer CPUs, can have variable access latency to get to another core. For example, in the first generation Threadripper CPUs, we had four chips on the package, each with 8 threads, and each with a different core-to-core latency depending on if it was on-die or off-die. This gets more complex with products like Lakefield, which has two different communication buses depending on which core is talking to which.

If you are a regular reader of AnandTech’s CPU reviews, you will recognize our Core-to-Core latency test. It’s a great way to show exactly how groups of cores are laid out on the silicon. This is a custom in-house test, and we know there are competing tests out there, but we feel ours is the most accurate to how quick an access between two cores can happen.

Looking at the above latency matrix of the Ryzen 9 9950X, we observe that the lowest latencies naturally occur between adjacent cores on the same CCX. The core pairs such as 0-1, 1-2, and 2-3 consistently show latencies in the 18.6 to 20.5 nanoseconds range. This is indicative of the fast L3 cache shared within the CCX, which ensures rapid communication between the inner cores on the same complex.

Compared to the Ryzen 9 7950X, we are seeing a slight increase in latencies within a single CCX. The SMT "advantage", where two logical cores sharing a single physical core have a lower latency, appears to be gone. Instead, latencies are consistently around 20ns from any logical core to any other logical core within a single CCX. That average is slightly up from 18ns on the 7950X, though it's not clear what the chief contributing factor is.

More significantly – and worryingly so – are the inter-CCD latencies. That is, the latency to go from a core on one CCD to a core on the other CCD. AMD's multi-CCD Ryzen designs have always taken a penalty here, as communicating between different CCDs means taking a long trek through AMD's Infinity Fabric to the IOD and back out to the other CCD. But the inter-CCD latencies are much higher here than we were expecting.

For reference, on the Ryzen 9 7950X, going to another CCD is around 76ns. But in Ryzen 9 9950X, we're seeing an average latency of 180ns, over twice the cost of the previous generation of Ryzen. Making this all the more confusing, Granite Ridge (desktop Ryzen 9000) reuses the same IOD and Infinity Fabric configuration as Raphael (Ryzen 7000) – all AMD has done is swap out the Zen 4 CCDs for Zen 5 CCDs. So by all expectations, we should not be seeing significantly higher inter-CCD latency here.

Our current working theory is that this is a side-effect of AMD's core parking changes for Ryzen 9000. That cores are being aggressively put to sleep, and that as a result, it's taking an extra 100ns to wake them up. If that is correct, then our core-to-core latency test is just about the worst case scenario for that strategy, as it's sending data between cores in short bursts, rather than running a sustained workload that keeps the cores alive over the long-haul.

At this point, we're running some additional tests on the 9950X without AMD's PPM provisioning driver installed, to see if that's having an impact. Otherwise, these high latencies, if accurate for all workloads, would represent a significant problem for multi-threaded workloads that straddle the Infinity Fabric.

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  • ZoZo - Thursday, August 15, 2024 - link

    Probably busy being RMA'd
  • bigboxes - Monday, August 19, 2024 - link

    HA!
  • shabby - Wednesday, August 14, 2024 - link

    That ppm issue is pretty bad, these chips shouldn't have been launched like this.
  • NextGen_Gamer - Wednesday, August 14, 2024 - link

    I am curious as to why AnandTech didn't immediately retest a subset of games, just a couple of the worst offenders, with the PPM disabled to see what happens. If the performance is restored and just fine with it turned off, that really isn't a huge problem. Software can always be fixed - or turned off lol. Definitely seems like AMD made the wrong choice saying PPM should be bundled and enabled by default though.
  • coburn_c - Wednesday, August 14, 2024 - link

    it's not a PPM issue, it's that one of the CCDs is trash
  • Gigaplex - Thursday, August 15, 2024 - link

    That would show up in a multi threaded load.
  • Oxford Guy - Friday, August 16, 2024 - link

    There is also a difference between one that clocks a bit better and "trash."

    It has been long known, afaik, that some cores are a bit better than others. It seems obvious that the same applies to CCDs.

    A third hypothesis, in terms of why this core parking software is being required seems to be that AMD is maximizing performance by favoring the CCD that has the better performance.
  • Samus - Saturday, August 17, 2024 - link

    It's a software issue, and like many previous software issues AMD has had (particularly with Microsoft Windows) it will be sorted out.
  • Blastdoor - Wednesday, August 14, 2024 - link

    Nice to see that AMD's 2024 top of the line chip fabbed on TSMC N4 can beat Intel's best 2023 chip fabbed on Intel 7.

    I look forward to seeing how it does against Intel's best 2024 chip fabbed on Intel 20A.
  • eva02langley - Wednesday, August 14, 2024 - link

    You probably missed the part about Intel Raptor Lakes Woes. Go back and read it.

    Also,

    "The Ryzen 9 9950X was 33% faster than the Intel Core i9 14900K performance overall and even the Ryzen 9 9900X was 18% faster than the Core i9 14900K. For those still on AM4, the Ryzen 9 9950X was delivering 1.87x the performance of the Ryzen 9 5950X processor. These are some great gains found with the Ryzen 9 9900 series."

    -Phoronix

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